1008
Olivier Guillemant，核心應用工程師
Question:
問題：
What are some methods for achieving a compact design under high step-down voltage ratios?
在高降壓比下實現(xiàn)緊湊設計的方法有哪些？
Answer:
答案：
This article will address why the nonisolated DC-to-DC buck converter (referred to simply as buck converter in this article) is facing serious challenges to downconverting high DC input voltages to very low output voltages at high output current. Three different approaches will be presented for downconverting steep voltage ratios while keeping a small form factor.
本文將闡述為何非隔離式DC-DC降壓轉(zhuǎn)換器（在本文中簡稱為降壓轉(zhuǎn)換器）在高輸出電流下將高DC輸入電壓轉(zhuǎn)換為很低的輸出電壓時會面臨嚴峻挑戰(zhàn)。本文將介紹可以實現(xiàn)高降壓比，同時保持小尺寸的三種不同方法。
Introduction
簡介
System designers can be faced with the challenge of downconverting high DC input voltages to very low output voltages at high output current (such as 60 V down to 3.3 V at 3.5 A), while maintaining high efficiency, small form factor, and simple design.
系統(tǒng)設計人員可能會面臨以下挑戰(zhàn)：在高輸出電流下將高DC輸入電壓下變頻為極低輸出電壓（例如在3.5 A時從60 V降至3.3 V），同時保持系統(tǒng)的高效率、小尺寸并實現(xiàn)簡單設計。
Combining high input-to-output voltage difference with high current automatically excludes the linear regulator due to the excessive power dissipation. Consequently, the designer must opt for a switching topology under these conditions. However, even with such topologies, it is still challenging to implement a design that is sufficiently compact for space-restricted applications.
將高輸入-輸出電壓差值與高電流結合使用，會因為功耗過高自動將線性穩(wěn)壓器排除在外。因此，設計人員必須在這些條件下選擇開關拓撲。但是，即使使用這種拓撲，對于空間有限的應用要實現(xiàn)足夠緊湊的設計仍然相當困難。
Challenges Faced by DC-to-DC Buck Converters
DC-DC降壓轉(zhuǎn)換器面臨的挑戰(zhàn)
One candidate for high step-down ratios is the buck converter because it is the topology of choice when having to step down an input voltage to a lower output voltage (such as VIN = 12 V down to VOUT = 3.3 V) in an efficient way, with a significant amount of current while also using a small footprint. However, there are conditions under which the buck converter faces serious challenges to keep its output voltage regulated. To understand these challenges, we must remember that the simplified duty cycle (D) of a buck converter operating in continuous conduction mode (CCM) is:
要實現(xiàn)高降壓比，一種方案是使用降壓轉(zhuǎn)換器，因為它是將輸入電壓高效降至更低的輸出電壓（例如，VIN = 12 V降至VOUT = 3.3 V）、仍然具有大量電流，且保持小尺寸的一種拓撲選項。但是，在某些情況下，降壓轉(zhuǎn)換器要保持輸出電壓穩(wěn)定，會面臨嚴峻的挑戰(zhàn)。為了理解這些挑戰(zhàn)，我們需要記住，在連續(xù)導通模式(CCM)下工作的降壓轉(zhuǎn)換器的占空比(D)可簡化為：
Now, the duty cycle also relates to the switching frequency (fSW) in the following way, where the on-time (tON) is the duration over which the control FET stays on during each switching period (T):
占空比和開關頻率(fSW)的關系如下所示，其中導通時間(tON)是指在每次開關期間(T)，控制FET保持開啟的時長：
Combining Equation 1 and Equation 2 shows how tON is influenced by the step-down voltage ratio and fSW:
結合公式1和公式2可以看出，tON如何受降壓比和fSW的影響：
Equation 3 tells us that the on-time decreases when the input-to-output voltage ratio (VIN/VOUT) and/or fSW increase. This means that the buck converter must be able to operate with very low on-time to regulate the output voltage in CCM under high VIN/VOUT ratio, and it becomes even more challenging with a high fSW.
從公式3可以看出，當輸入-輸出電壓比(VIN/VOUT)和/或fSW增大時，導通時間會降低。這意味著降壓轉(zhuǎn)換器必須能夠以很低的導通時間運行，以便在高VIN/VOUT比率下調(diào)節(jié)CCM中的輸出電壓，而在高fSW下這會更難實現(xiàn)。
Let’s consider an application with VIN(MAX) = 60 V, VOUT = 3.3 V at IOUT(MAX) = 3.5 A. When required, we shall use values from the LT8641 data sheet because a solution with the LT8641 will be provided in a later section. The required minimum on-time (tON(MIN)) corresponds to the highest input voltage (VIN(MAX)). In order to assess this tON(MIN), it is advised to make Equation 3 more accurate. By including VSW(BOT) and VSW(TOP), the voltage drops for the two power MOSFETs of the buck converter, and replacing VIN with VIN(MAX) we obtain:
我們假設在一個應用中，VIN(MAX) = 60 V，VOUT = 3.3 V，IOUT(MAX) = 3.5 A。在必要時，我們需要使用LT8641數(shù)據(jù)手冊中的數(shù)值，因為在之后的章節(jié)中，我們將提供采用LT8641的解決方案。所需的最小導通時間(tON(MIN))對應最高輸入電壓(VIN(MAX))。為了評估這個tON(MIN)，建議提高公式3的準確度。通過包含降壓轉(zhuǎn)換器的兩個功率MOSFET的壓降VSW(BOT)和VSW(TOP)，并用VIN(MAX)替代VIN，我們得出：
Using Equation 4 with VIN(MAX), fSW = 1 MHz, we obtain a tON(MIN) of 61 ns. For VSW(BOT) and VSW(TOP), we made use of the values provided for RDS(ON)(BOT) and RDS(ON)(TOP) in the LT8641 data sheet, knowing as well that VSW(BOT) = RDS(ON)(BOT) × IOUT(MAX) and VSW(TOP) = RDS(ON)(TOP) × IOUT(MAX).
通過在公式4中使用VIN(MAX)、fSW = 1 MHz，我們得出tON(MIN)為61 ns。為了計算VSW(BOT)和VSW(TOP)，我們使用了LT8641數(shù)據(jù)手冊中提供的RDS(ON)(BOT)和RDS(ON)(TOP)值，且已知VSW(BOT) = RDS(ON)(BOT) × IOUT(MAX)，VSW(TOP) = RDS(ON)(TOP) × IOUT(MAX)。
Buck converters can rarely guarantee a tON(MIN) with the short value of 61 ns obtained above; therefore, the system designer is forced to search for alternative topologies. There are three possible solutions for high step-down voltage ratios.
從上述公式可得到61 ns的數(shù)值，這樣短的時間數(shù)值，降壓轉(zhuǎn)換器很難保證tON(MIN)；所以，系統(tǒng)設計人員不得不尋找可替代的拓撲。目前提供三種可實現(xiàn)高降壓比的可行解決方案。
Three Compact Solutions for VIN(MAX) = 60 V, VOUT = 3.3 V at IOUT(MAX) = 3.5 A
三種緊湊型解決方案，VIN(MAX) = 60 V，VOUT = 3.3 V，IOUT(MAX) = 3.5 A
Solution 1: Using the LT3748 Non-opto Flyback
解決方案1：使用LT3748非光耦反激式變壓器
The first option consists of using an isolated topology, where the transformer performs most of the downconversion thanks to its N:1 turn ratio. For that matter, Analog Devices offers flyback controllers such as the LT3748 that do not require a third transformer winding or opto-isolator, making the design simpler and compact. The LT3748 solution for our conditions is presented in Figure 1.
第一種選擇是使用隔離拓撲，變壓器具有N:1匝數(shù)比，負責執(zhí)行大部分下變頻。為此，ADI公司提供反激式控制器，例如LT3748，該控制器不需要第三個變壓器繞組或光隔離器，使設計更簡單，更緊湊。圖1顯示適用于這種情況的LT3748解決方案。
Even though the LT3748 solution simplifies the design and saves space compared with a standard flyback design, a transformer is still required. For applications where isolation between input and output sides is not required, it is preferred to avoid this component, which adds complexity and increases the form factor vs. a nonisolated solution.
盡管與標準反激式設計相比，LT3748解決方案簡化了設計并節(jié)省了空間，但仍然需要使用變壓器。對于無需隔離輸入端和輸出端的應用，最好是避免使用該組件，相比非隔離解決方案，該組件會增加設計復雜性和增大尺寸。
Solution 2: Using the LTM8073 and LTM4624 μModule Devices
解決方案2：使用LTM8073和LTM4624 μModule器件
As an alternative, the designer can downconvert in two steps. To achieve a reduced component count of only 10, two μModule? devices and eight external components can be used, as demonstrated in Figure 2. Moreover, the two μModule devices already integrate their respective power inductor, sparing the system engineer a design task that is rarely straightforward. The LTM8073 and LTM4624 both come in BGA packages, with respective dimensions of 9 mm × 6.25 mm × 3.32 mm and 6.25 mm × 6.25 mm × 5.01 mm (L × W × H), providing a solution with a small form factor.
作為一種替代方案，設計人員可以通過兩個步驟進行下變頻。要實現(xiàn)更少的組件數(shù)量（僅為10個），可以使用2個μModule?器件和8個外部組件，如圖2所示。此外，這兩款μModule器件已集成各自的功率電感，為系統(tǒng)工程師免除了一項困難的設計任務。LTM8073和LTM4624均采用BGA封裝，尺寸分別為9 mm × 6.25 mm × 3.32 mm和6.25 mm × 6.25 mm × 5.01 mm (L × W × H)，可提供小尺寸解決方案。
Since the LTM4624 exhibits an efficiency of 89% under these conditions, the LTM8073 supplies at most 1.1 A to the input of the LTM4624. Given that the LTM8073 can provide up to 3 A of output current, it can be used to supply other circuit rails. It is with this purpose in mind that we selected 12 V as the intermediary voltage (VINT) in Figure 2.
由于在這些條件下LTM4624展現(xiàn)的效率為89%，LTM8073最多為LTM4624的輸入端提供1.1 A。由于LTM8073可以提供高達3 A輸出電流，因此可用來為其他電源軌供電。為此，在圖2中，我們選擇12 V作為中間電壓(VINT)。
Despite avoiding the usage of a transformer, some designers might be reluctant to implement a solution that requires two separate buck converters, especially if no intermediary voltage is required to supply other rails.
盡管應避免使用變壓器，但有些設計人員可能不愿使用需要兩個獨立的降壓轉(zhuǎn)換器的解決方案，尤其是無需采用中間電壓為其他電源軌供電的情況下。
Solution 3: Using the LT8641 Buck Converter
解決方案3：使用LT8641降壓轉(zhuǎn)換器
Consequently, in many cases, using a single buck converter would be preferred because it provides the optimal solution to combine system efficiency, a small footprint, and design simplicity. But did we not just demonstrate that buck converters cannot cope with high VIN/VOUT combined with high fSW?
所以，在許多情況下，使用單個降壓轉(zhuǎn)換器成為首選，因為它是比較理想的解決方案，具有系統(tǒng)效率高、小尺寸和設計簡單的特點。但是，我們前面不是展示降壓轉(zhuǎn)換器無法應對高VIN/VOUT和高fSW嗎？
This statement might apply to most buck converters, but not to all of them. The ADI portfolio includes buck converters such as the LT8641, which is specified with a very short minimum on-time of 35 ns typical (50 ns max) over the full operating temperature range. Those specifications are safely below the required minimum on-time of 61 ns previously calculated, providing us with a third possible compact solution. Figure 3 shows how simple the LT8641 circuit can be.
這個說法可能適用于大部分降壓轉(zhuǎn)換器，但并非全部。ADI產(chǎn)品系列中包含LT8641之類降壓轉(zhuǎn)換器，在整個工作溫度范圍內(nèi)，它具有較短的最低導通時間，一般為35 ns（最大50 ns）。這些規(guī)格都在之前計算得出的61 ns最小導通時間以下，為我們提供了第3種可行的緊湊型解決方案。圖3顯示LT8641電路有多么簡單。
It is also worth noting that the LT8641 solution can be the most efficient of the three. Indeed, if efficiency must be further optimized compared with Figure 3, we can decrease fSW and select a bigger inductor size.
還有一點值得注意，LT8641解決方案可能是3種解決方案中最高效的。事實上，如果與圖3相比必須進一步優(yōu)化效率，我們可以降低fSW并選擇更大的電感尺寸。
Although fSW can also be decreased with Solution 2, the integration of the power inductors does not offer the flexibility to increase the efficiency beyond a certain point. Moreover, the use of two consecutive downconversion stages has a small negative impact on the efficiency.
盡管也可以通過解決方案2來降低fSW，但集成功率電感后無法靈活提高效率，達到高于某個點的目標。此外，使用兩個連續(xù)下變頻級對效率的負面影響較小。
In the case of Solution 1, the efficiency will be very high for a flyback design, thanks to the operation in boundary mode and to all components removed with the no-optical feedback design. However, the efficiency cannot be fully optimized because there is a limited number of transformers to select from, as opposed to the broad portfolio of inductors available for Solution 3.
在使用解決方案1時，由于在邊界模式下運行，以及在非光學反饋設計中移除了所有組件，因此反激式設計的效率非常高。但是，效率不能完全優(yōu)化，因為可選的變壓器數(shù)量有限，而解決方案3則有廣泛的電感產(chǎn)品系列可供選擇。
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Figure 1. A circuit solution with the LT3748 downconverting 60 V input to 3.3 V output.
圖1.采用LT3748的電路解決方案，將60 V輸入下變頻至3.3 V輸出。
Figure 2. A circuit solution with the LTM8073 and LTM4624, downconverting 60 V input to 3.3 V output.
圖2.采用LTM8073和LTM4624的電路解決方案，將60 V輸入下變頻至3.3 V輸出。
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Figure 3. A circuit solution with the LT8641 downconverting 60 V input to 3.3 V output.
圖3.采用LT8641的電路解決方案，將60 V輸入下變頻至3.3 V輸出。
An Alternative Way to Check Whether LT8641 Fulfills Requirements
檢查LT8641是否滿足要求的另一種方法
In most applications, the only adjustable parameter in Equation 4 is the switching frequency. Consequently, we reformulate Equation 4 to assess the maximum permitted fSW for the LT8641 under given conditions. By doing this, we obtain Equation 5, which is also provided on page 16 of the LT8641 data sheet.
在大多數(shù)應用中，公式4中唯一可調(diào)的參數(shù)是開關頻率。因此，我們重新變換公式4，以評估LT8641在給定條件下允許的最大fSW。于是，我們得到公式5，LT8641數(shù)據(jù)手冊的第16頁也提供了這個公式。
Let’s use this equation with the following example: VIN = 48 V, VOUT = 3.3 V, IOUT(MAX) = 1.5 A, fSW = 2 MHz. An input voltage of 48 V is commonly found in automotive and industrial applications. By inserting those conditions in Equation 5, we obtain:
我們在以下示例中使用此公式：VIN = 48 V，VOUT = 3.3 V，IOUT(MAX) = 1.5 A，fSW = 2 MHz。汽車和工業(yè)應用中經(jīng)常使用48 V輸入電壓。在公式5中代入這些條件后，我們得出：
Therefore, under the provided application conditions, the LT8641 would operate safely with fSW set as high as 2.12 MHz, confirming that the LT8641 is a good choice for this application.
因此，在給定的應用條件下，在fSW高達2.12 MHz時，LT8641能夠安全運行，證實LT8641是適合此應用的一個不錯的選擇。
Conclusion
結論
Three different methods were presented to achieve a compact design under high step-down voltage ratios. The LT3748 flyback solution does not require a bulky opto-isolator and is recommended for designs where isolation is necessary between input and output sides. The second method, which involves implementing the LTM8073 and LTM4624 μModule devices, is of particular interest when the designer is hesitant to select the optimal inductor for the application and/or when an additional intermediary rail must be supplied. The third method, a design based on the LT8641 buck converter, offers the most compact and simplest solution when the sole requirement is the steep voltage downconversion.
本文提出了三種不同的方法，以在高降壓比下實現(xiàn)緊湊型設計。LT3748反激式解決方案不需要使用笨重的光隔離器，推薦用于需要隔離輸入端和輸出端的設計。第2種方法需要使用LTM8073和LTM4624 μModule器件，當設計人員為應用選擇最佳電感猶豫不決，以及/或何時必須提供額外的中間電源軌時，這種解決方案會非常有用。第3種方法基于LT8641降壓轉(zhuǎn)換器進行設計，如果只是要求實現(xiàn)陡電壓下變頻時，可提供緊湊且簡單的解決方案。
About the Author
作者簡介
Olivier Guillemant is a central applications engineer at Analog Devices in Munich, Germany. He provides design support for the Power by Linear portfolio for European broad market customers. He has held various power application positions since 2000 and joined ADI in 2021. He received his M.Sc. in electronics and telecommunications from University of Lille, France.
Olivier Guillemant是ADI公司的核心應用工程師，工作地點在德國慕尼黑。他為歐洲的廣泛市場客戶提供Power by Linear產(chǎn)品組合的設計支持。他自2000年起擔任過各種電源應用職位，于2021年加入ADI公司，擁有法國里爾大學的電子和電信碩士學位。
